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#ifndef EE_EEREGS_H
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#define EE_EEREGS_H
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#define D_CTRL_RELE_M (0x01<<1)
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#define REG_DMAC_CTRL (volatile u_int *)0x1000e000
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#define REG_DMAC_STAT (volatile u_int *)0x1000e010
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#define VU0_MICRO_ADDR ((u_int)(0x11000000))
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#define VU0_MEM_ADDR ((u_int)(0x11004000))
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#define VU1_MICRO_ADDR ((u_int)(0x11008000))
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#define VU1_MEM_ADDR ((u_int)(0x1100c000))
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#define IPU_CMD ((volatile u_int *)(0x10002000))
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#define IPU_CTRL ((volatile u_int *)(0x10002010))
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#define IPU_BP ((volatile u_int *)(0x10002020))
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#define DGET_IPU_CTRL() (*IPU_CTRL)
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#define DPUT_IPU_CMD(x) (*IPU_CMD = (x))
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#define DGET_IPU_CTRL() (*IPU_CTRL)
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#define DGET_IPU_BP() (*IPU_BP)
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#define D_ENABLER ((volatile u_int *)(0x1000f520))
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#define D_ENABLEW ((volatile u_int *)(0x1000f590))
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#define D3_CHCR ((volatile u_int *)(0x1000b000))
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#define D4_CHCR ((volatile u_int *)(0x1000b400))
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#define D3_CHCR ((volatile u_int *)(0x1000b000))
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#define D3_MADR ((volatile u_int *)(0x1000b010))
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#define D3_QWC ((volatile u_int *)(0x1000b020))
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#define D4_CHCR ((volatile u_int *)(0x1000b400))
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#define D4_MADR ((volatile u_int *)(0x1000b410))
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#define D4_QWC ((volatile u_int *)(0x1000b420))
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#define D4_TADR ((volatile u_int *)(0x1000b430))
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#define GS_CSR ((volatile u_long *)(0x12001000))
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typedef struct {
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unsigned EN1:1;
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unsigned EN2:1;
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unsigned CRTMD:3;
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unsigned MMOD:1;
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unsigned AMOD:1;
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unsigned SLBG:1;
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unsigned ALP:8;
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unsigned p0:16;
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unsigned int p1;
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} tGS_PMODE;
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typedef struct {
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unsigned INT:1;
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unsigned FFMD:1;
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unsigned DPMS:2;
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unsigned p0:28;
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unsigned int p1;
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} tGS_SMODE2;
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typedef struct {
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unsigned FBP:9;
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unsigned FBW:6;
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unsigned PSM:5;
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unsigned p0:12;
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unsigned DBX:11;
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unsigned DBY:11;
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unsigned p1:10;
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} tGS_DISPFB2;
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typedef struct {
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unsigned DX:12;
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unsigned DY:11;
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unsigned MAGH:4;
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unsigned MAGV:2;
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unsigned p0:3;
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unsigned DW:12;
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unsigned DH:11;
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unsigned p1:9;
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} tGS_DISPLAY2;
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typedef struct {
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unsigned R:8;
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unsigned G:8;
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unsigned B:8;
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unsigned p0:8;
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unsigned int p1;
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} tGS_BGCOLOR;
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#endif // EE_EEREGS_H
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